mirror of
https://github.com/superseriousbusiness/gotosocial.git
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599 lines
14 KiB
Go
599 lines
14 KiB
Go
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// Copyright 2015 The Go Authors. All rights reserved.
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// Use of this source code is governed by a BSD-style
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// license that can be found in the LICENSE file.
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package obj
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import (
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"bytes"
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"github.com/twitchyliquid64/golang-asm/objabi"
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"fmt"
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"io"
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"strings"
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)
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const REG_NONE = 0
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// Line returns a string containing the filename and line number for p
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func (p *Prog) Line() string {
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return p.Ctxt.OutermostPos(p.Pos).Format(false, true)
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}
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func (p *Prog) InnermostLine(w io.Writer) {
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p.Ctxt.InnermostPos(p.Pos).WriteTo(w, false, true)
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}
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// InnermostLineNumber returns a string containing the line number for the
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// innermost inlined function (if any inlining) at p's position
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func (p *Prog) InnermostLineNumber() string {
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return p.Ctxt.InnermostPos(p.Pos).LineNumber()
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}
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// InnermostLineNumberHTML returns a string containing the line number for the
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// innermost inlined function (if any inlining) at p's position
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func (p *Prog) InnermostLineNumberHTML() string {
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return p.Ctxt.InnermostPos(p.Pos).LineNumberHTML()
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}
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// InnermostFilename returns a string containing the innermost
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// (in inlining) filename at p's position
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func (p *Prog) InnermostFilename() string {
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// TODO For now, this is only used for debugging output, and if we need more/better information, it might change.
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// An example of what we might want to see is the full stack of positions for inlined code, so we get some visibility into what is recorded there.
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pos := p.Ctxt.InnermostPos(p.Pos)
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if !pos.IsKnown() {
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return "<unknown file name>"
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}
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return pos.Filename()
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}
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var armCondCode = []string{
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".EQ",
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".NE",
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".CS",
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".CC",
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".MI",
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".PL",
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".VS",
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".VC",
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".HI",
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".LS",
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".GE",
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".LT",
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".GT",
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".LE",
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"",
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".NV",
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}
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/* ARM scond byte */
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const (
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C_SCOND = (1 << 4) - 1
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C_SBIT = 1 << 4
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C_PBIT = 1 << 5
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C_WBIT = 1 << 6
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C_FBIT = 1 << 7
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C_UBIT = 1 << 7
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C_SCOND_XOR = 14
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)
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// CConv formats opcode suffix bits (Prog.Scond).
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func CConv(s uint8) string {
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if s == 0 {
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return ""
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}
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for i := range opSuffixSpace {
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sset := &opSuffixSpace[i]
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if sset.arch == objabi.GOARCH {
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return sset.cconv(s)
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}
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}
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return fmt.Sprintf("SC???%d", s)
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}
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// CConvARM formats ARM opcode suffix bits (mostly condition codes).
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func CConvARM(s uint8) string {
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// TODO: could be great to move suffix-related things into
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// ARM asm backends some day.
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// obj/x86 can be used as an example.
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sc := armCondCode[(s&C_SCOND)^C_SCOND_XOR]
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if s&C_SBIT != 0 {
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sc += ".S"
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}
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if s&C_PBIT != 0 {
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sc += ".P"
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}
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if s&C_WBIT != 0 {
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sc += ".W"
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}
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if s&C_UBIT != 0 { /* ambiguous with FBIT */
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sc += ".U"
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}
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return sc
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}
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func (p *Prog) String() string {
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if p == nil {
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return "<nil Prog>"
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}
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if p.Ctxt == nil {
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return "<Prog without ctxt>"
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}
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return fmt.Sprintf("%.5d (%v)\t%s", p.Pc, p.Line(), p.InstructionString())
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}
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func (p *Prog) InnermostString(w io.Writer) {
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if p == nil {
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io.WriteString(w, "<nil Prog>")
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return
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}
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if p.Ctxt == nil {
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io.WriteString(w, "<Prog without ctxt>")
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return
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}
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fmt.Fprintf(w, "%.5d (", p.Pc)
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p.InnermostLine(w)
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io.WriteString(w, ")\t")
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p.WriteInstructionString(w)
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}
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// InstructionString returns a string representation of the instruction without preceding
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// program counter or file and line number.
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func (p *Prog) InstructionString() string {
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buf := new(bytes.Buffer)
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p.WriteInstructionString(buf)
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return buf.String()
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}
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// WriteInstructionString writes a string representation of the instruction without preceding
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// program counter or file and line number.
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func (p *Prog) WriteInstructionString(w io.Writer) {
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if p == nil {
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io.WriteString(w, "<nil Prog>")
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return
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}
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if p.Ctxt == nil {
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io.WriteString(w, "<Prog without ctxt>")
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return
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}
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sc := CConv(p.Scond)
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io.WriteString(w, p.As.String())
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io.WriteString(w, sc)
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sep := "\t"
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if p.From.Type != TYPE_NONE {
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io.WriteString(w, sep)
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WriteDconv(w, p, &p.From)
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sep = ", "
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}
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if p.Reg != REG_NONE {
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// Should not happen but might as well show it if it does.
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fmt.Fprintf(w, "%s%v", sep, Rconv(int(p.Reg)))
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sep = ", "
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}
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for i := range p.RestArgs {
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io.WriteString(w, sep)
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WriteDconv(w, p, &p.RestArgs[i])
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sep = ", "
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}
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if p.As == ATEXT {
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// If there are attributes, print them. Otherwise, skip the comma.
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// In short, print one of these two:
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// TEXT foo(SB), DUPOK|NOSPLIT, $0
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// TEXT foo(SB), $0
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s := p.From.Sym.Attribute.TextAttrString()
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if s != "" {
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fmt.Fprintf(w, "%s%s", sep, s)
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sep = ", "
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}
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}
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if p.To.Type != TYPE_NONE {
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io.WriteString(w, sep)
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WriteDconv(w, p, &p.To)
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}
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if p.RegTo2 != REG_NONE {
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fmt.Fprintf(w, "%s%v", sep, Rconv(int(p.RegTo2)))
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}
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}
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func (ctxt *Link) NewProg() *Prog {
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p := new(Prog)
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p.Ctxt = ctxt
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return p
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}
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func (ctxt *Link) CanReuseProgs() bool {
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return ctxt.Debugasm == 0
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}
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func Dconv(p *Prog, a *Addr) string {
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buf := new(bytes.Buffer)
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WriteDconv(buf, p, a)
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return buf.String()
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}
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func WriteDconv(w io.Writer, p *Prog, a *Addr) {
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switch a.Type {
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default:
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fmt.Fprintf(w, "type=%d", a.Type)
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case TYPE_NONE:
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if a.Name != NAME_NONE || a.Reg != 0 || a.Sym != nil {
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a.WriteNameTo(w)
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fmt.Fprintf(w, "(%v)(NONE)", Rconv(int(a.Reg)))
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}
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case TYPE_REG:
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// TODO(rsc): This special case is for x86 instructions like
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// PINSRQ CX,$1,X6
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// where the $1 is included in the p->to Addr.
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// Move into a new field.
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if a.Offset != 0 && (a.Reg < RBaseARM64 || a.Reg >= RBaseMIPS) {
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fmt.Fprintf(w, "$%d,%v", a.Offset, Rconv(int(a.Reg)))
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return
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}
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if a.Name != NAME_NONE || a.Sym != nil {
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a.WriteNameTo(w)
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fmt.Fprintf(w, "(%v)(REG)", Rconv(int(a.Reg)))
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} else {
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io.WriteString(w, Rconv(int(a.Reg)))
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}
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if (RBaseARM64+1<<10+1<<9) /* arm64.REG_ELEM */ <= a.Reg &&
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a.Reg < (RBaseARM64+1<<11) /* arm64.REG_ELEM_END */ {
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fmt.Fprintf(w, "[%d]", a.Index)
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}
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case TYPE_BRANCH:
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if a.Sym != nil {
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fmt.Fprintf(w, "%s(SB)", a.Sym.Name)
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} else if a.Target() != nil {
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fmt.Fprint(w, a.Target().Pc)
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} else {
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fmt.Fprintf(w, "%d(PC)", a.Offset)
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}
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case TYPE_INDIR:
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io.WriteString(w, "*")
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a.WriteNameTo(w)
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case TYPE_MEM:
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a.WriteNameTo(w)
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if a.Index != REG_NONE {
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if a.Scale == 0 {
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// arm64 shifted or extended register offset, scale = 0.
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fmt.Fprintf(w, "(%v)", Rconv(int(a.Index)))
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} else {
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fmt.Fprintf(w, "(%v*%d)", Rconv(int(a.Index)), int(a.Scale))
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}
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}
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case TYPE_CONST:
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io.WriteString(w, "$")
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a.WriteNameTo(w)
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if a.Reg != 0 {
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fmt.Fprintf(w, "(%v)", Rconv(int(a.Reg)))
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}
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case TYPE_TEXTSIZE:
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if a.Val.(int32) == objabi.ArgsSizeUnknown {
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fmt.Fprintf(w, "$%d", a.Offset)
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} else {
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fmt.Fprintf(w, "$%d-%d", a.Offset, a.Val.(int32))
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}
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case TYPE_FCONST:
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str := fmt.Sprintf("%.17g", a.Val.(float64))
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// Make sure 1 prints as 1.0
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if !strings.ContainsAny(str, ".e") {
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str += ".0"
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}
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fmt.Fprintf(w, "$(%s)", str)
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case TYPE_SCONST:
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fmt.Fprintf(w, "$%q", a.Val.(string))
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case TYPE_ADDR:
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io.WriteString(w, "$")
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a.WriteNameTo(w)
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case TYPE_SHIFT:
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v := int(a.Offset)
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ops := "<<>>->@>"
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switch objabi.GOARCH {
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case "arm":
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op := ops[((v>>5)&3)<<1:]
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if v&(1<<4) != 0 {
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fmt.Fprintf(w, "R%d%c%cR%d", v&15, op[0], op[1], (v>>8)&15)
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} else {
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fmt.Fprintf(w, "R%d%c%c%d", v&15, op[0], op[1], (v>>7)&31)
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}
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if a.Reg != 0 {
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fmt.Fprintf(w, "(%v)", Rconv(int(a.Reg)))
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}
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case "arm64":
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op := ops[((v>>22)&3)<<1:]
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r := (v >> 16) & 31
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fmt.Fprintf(w, "%s%c%c%d", Rconv(r+RBaseARM64), op[0], op[1], (v>>10)&63)
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default:
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panic("TYPE_SHIFT is not supported on " + objabi.GOARCH)
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}
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case TYPE_REGREG:
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fmt.Fprintf(w, "(%v, %v)", Rconv(int(a.Reg)), Rconv(int(a.Offset)))
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case TYPE_REGREG2:
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fmt.Fprintf(w, "%v, %v", Rconv(int(a.Offset)), Rconv(int(a.Reg)))
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case TYPE_REGLIST:
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io.WriteString(w, RLconv(a.Offset))
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}
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}
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func (a *Addr) WriteNameTo(w io.Writer) {
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switch a.Name {
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default:
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fmt.Fprintf(w, "name=%d", a.Name)
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case NAME_NONE:
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switch {
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case a.Reg == REG_NONE:
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fmt.Fprint(w, a.Offset)
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case a.Offset == 0:
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fmt.Fprintf(w, "(%v)", Rconv(int(a.Reg)))
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case a.Offset != 0:
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fmt.Fprintf(w, "%d(%v)", a.Offset, Rconv(int(a.Reg)))
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}
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// Note: a.Reg == REG_NONE encodes the default base register for the NAME_ type.
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case NAME_EXTERN:
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reg := "SB"
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if a.Reg != REG_NONE {
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reg = Rconv(int(a.Reg))
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}
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if a.Sym != nil {
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fmt.Fprintf(w, "%s%s(%s)", a.Sym.Name, offConv(a.Offset), reg)
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} else {
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fmt.Fprintf(w, "%s(%s)", offConv(a.Offset), reg)
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}
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case NAME_GOTREF:
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reg := "SB"
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if a.Reg != REG_NONE {
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reg = Rconv(int(a.Reg))
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}
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if a.Sym != nil {
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fmt.Fprintf(w, "%s%s@GOT(%s)", a.Sym.Name, offConv(a.Offset), reg)
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} else {
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fmt.Fprintf(w, "%s@GOT(%s)", offConv(a.Offset), reg)
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}
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case NAME_STATIC:
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reg := "SB"
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if a.Reg != REG_NONE {
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reg = Rconv(int(a.Reg))
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}
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if a.Sym != nil {
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fmt.Fprintf(w, "%s<>%s(%s)", a.Sym.Name, offConv(a.Offset), reg)
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} else {
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fmt.Fprintf(w, "<>%s(%s)", offConv(a.Offset), reg)
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}
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case NAME_AUTO:
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reg := "SP"
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if a.Reg != REG_NONE {
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reg = Rconv(int(a.Reg))
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}
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if a.Sym != nil {
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fmt.Fprintf(w, "%s%s(%s)", a.Sym.Name, offConv(a.Offset), reg)
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} else {
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fmt.Fprintf(w, "%s(%s)", offConv(a.Offset), reg)
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}
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case NAME_PARAM:
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reg := "FP"
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if a.Reg != REG_NONE {
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reg = Rconv(int(a.Reg))
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}
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if a.Sym != nil {
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fmt.Fprintf(w, "%s%s(%s)", a.Sym.Name, offConv(a.Offset), reg)
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} else {
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fmt.Fprintf(w, "%s(%s)", offConv(a.Offset), reg)
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}
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case NAME_TOCREF:
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reg := "SB"
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if a.Reg != REG_NONE {
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reg = Rconv(int(a.Reg))
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}
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if a.Sym != nil {
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fmt.Fprintf(w, "%s%s(%s)", a.Sym.Name, offConv(a.Offset), reg)
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} else {
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fmt.Fprintf(w, "%s(%s)", offConv(a.Offset), reg)
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}
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}
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}
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func offConv(off int64) string {
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if off == 0 {
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return ""
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}
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return fmt.Sprintf("%+d", off)
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}
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|
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// opSuffixSet is like regListSet, but for opcode suffixes.
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||
|
//
|
||
|
// Unlike some other similar structures, uint8 space is not
|
||
|
// divided by its own values set (because there are only 256 of them).
|
||
|
// Instead, every arch may interpret/format all 8 bits as they like,
|
||
|
// as long as they register proper cconv function for it.
|
||
|
type opSuffixSet struct {
|
||
|
arch string
|
||
|
cconv func(suffix uint8) string
|
||
|
}
|
||
|
|
||
|
var opSuffixSpace []opSuffixSet
|
||
|
|
||
|
// RegisterOpSuffix assigns cconv function for formatting opcode suffixes
|
||
|
// when compiling for GOARCH=arch.
|
||
|
//
|
||
|
// cconv is never called with 0 argument.
|
||
|
func RegisterOpSuffix(arch string, cconv func(uint8) string) {
|
||
|
opSuffixSpace = append(opSuffixSpace, opSuffixSet{
|
||
|
arch: arch,
|
||
|
cconv: cconv,
|
||
|
})
|
||
|
}
|
||
|
|
||
|
type regSet struct {
|
||
|
lo int
|
||
|
hi int
|
||
|
Rconv func(int) string
|
||
|
}
|
||
|
|
||
|
// Few enough architectures that a linear scan is fastest.
|
||
|
// Not even worth sorting.
|
||
|
var regSpace []regSet
|
||
|
|
||
|
/*
|
||
|
Each architecture defines a register space as a unique
|
||
|
integer range.
|
||
|
Here is the list of architectures and the base of their register spaces.
|
||
|
*/
|
||
|
|
||
|
const (
|
||
|
// Because of masking operations in the encodings, each register
|
||
|
// space should start at 0 modulo some power of 2.
|
||
|
RBase386 = 1 * 1024
|
||
|
RBaseAMD64 = 2 * 1024
|
||
|
RBaseARM = 3 * 1024
|
||
|
RBasePPC64 = 4 * 1024 // range [4k, 8k)
|
||
|
RBaseARM64 = 8 * 1024 // range [8k, 13k)
|
||
|
RBaseMIPS = 13 * 1024 // range [13k, 14k)
|
||
|
RBaseS390X = 14 * 1024 // range [14k, 15k)
|
||
|
RBaseRISCV = 15 * 1024 // range [15k, 16k)
|
||
|
RBaseWasm = 16 * 1024
|
||
|
)
|
||
|
|
||
|
// RegisterRegister binds a pretty-printer (Rconv) for register
|
||
|
// numbers to a given register number range. Lo is inclusive,
|
||
|
// hi exclusive (valid registers are lo through hi-1).
|
||
|
func RegisterRegister(lo, hi int, Rconv func(int) string) {
|
||
|
regSpace = append(regSpace, regSet{lo, hi, Rconv})
|
||
|
}
|
||
|
|
||
|
func Rconv(reg int) string {
|
||
|
if reg == REG_NONE {
|
||
|
return "NONE"
|
||
|
}
|
||
|
for i := range regSpace {
|
||
|
rs := ®Space[i]
|
||
|
if rs.lo <= reg && reg < rs.hi {
|
||
|
return rs.Rconv(reg)
|
||
|
}
|
||
|
}
|
||
|
return fmt.Sprintf("R???%d", reg)
|
||
|
}
|
||
|
|
||
|
type regListSet struct {
|
||
|
lo int64
|
||
|
hi int64
|
||
|
RLconv func(int64) string
|
||
|
}
|
||
|
|
||
|
var regListSpace []regListSet
|
||
|
|
||
|
// Each architecture is allotted a distinct subspace: [Lo, Hi) for declaring its
|
||
|
// arch-specific register list numbers.
|
||
|
const (
|
||
|
RegListARMLo = 0
|
||
|
RegListARMHi = 1 << 16
|
||
|
|
||
|
// arm64 uses the 60th bit to differentiate from other archs
|
||
|
RegListARM64Lo = 1 << 60
|
||
|
RegListARM64Hi = 1<<61 - 1
|
||
|
|
||
|
// x86 uses the 61th bit to differentiate from other archs
|
||
|
RegListX86Lo = 1 << 61
|
||
|
RegListX86Hi = 1<<62 - 1
|
||
|
)
|
||
|
|
||
|
// RegisterRegisterList binds a pretty-printer (RLconv) for register list
|
||
|
// numbers to a given register list number range. Lo is inclusive,
|
||
|
// hi exclusive (valid register list are lo through hi-1).
|
||
|
func RegisterRegisterList(lo, hi int64, rlconv func(int64) string) {
|
||
|
regListSpace = append(regListSpace, regListSet{lo, hi, rlconv})
|
||
|
}
|
||
|
|
||
|
func RLconv(list int64) string {
|
||
|
for i := range regListSpace {
|
||
|
rls := ®ListSpace[i]
|
||
|
if rls.lo <= list && list < rls.hi {
|
||
|
return rls.RLconv(list)
|
||
|
}
|
||
|
}
|
||
|
return fmt.Sprintf("RL???%d", list)
|
||
|
}
|
||
|
|
||
|
type opSet struct {
|
||
|
lo As
|
||
|
names []string
|
||
|
}
|
||
|
|
||
|
// Not even worth sorting
|
||
|
var aSpace []opSet
|
||
|
|
||
|
// RegisterOpcode binds a list of instruction names
|
||
|
// to a given instruction number range.
|
||
|
func RegisterOpcode(lo As, Anames []string) {
|
||
|
if len(Anames) > AllowedOpCodes {
|
||
|
panic(fmt.Sprintf("too many instructions, have %d max %d", len(Anames), AllowedOpCodes))
|
||
|
}
|
||
|
aSpace = append(aSpace, opSet{lo, Anames})
|
||
|
}
|
||
|
|
||
|
func (a As) String() string {
|
||
|
if 0 <= a && int(a) < len(Anames) {
|
||
|
return Anames[a]
|
||
|
}
|
||
|
for i := range aSpace {
|
||
|
as := &aSpace[i]
|
||
|
if as.lo <= a && int(a-as.lo) < len(as.names) {
|
||
|
return as.names[a-as.lo]
|
||
|
}
|
||
|
}
|
||
|
return fmt.Sprintf("A???%d", a)
|
||
|
}
|
||
|
|
||
|
var Anames = []string{
|
||
|
"XXX",
|
||
|
"CALL",
|
||
|
"DUFFCOPY",
|
||
|
"DUFFZERO",
|
||
|
"END",
|
||
|
"FUNCDATA",
|
||
|
"JMP",
|
||
|
"NOP",
|
||
|
"PCALIGN",
|
||
|
"PCDATA",
|
||
|
"RET",
|
||
|
"GETCALLERPC",
|
||
|
"TEXT",
|
||
|
"UNDEF",
|
||
|
}
|
||
|
|
||
|
func Bool2int(b bool) int {
|
||
|
// The compiler currently only optimizes this form.
|
||
|
// See issue 6011.
|
||
|
var i int
|
||
|
if b {
|
||
|
i = 1
|
||
|
} else {
|
||
|
i = 0
|
||
|
}
|
||
|
return i
|
||
|
}
|