mirror of
https://github.com/superseriousbusiness/gotosocial.git
synced 2024-11-23 12:16:38 +00:00
9d0df426da
* feat: vendor minio client * feat: introduce storage package with s3 support * feat: serve s3 files directly this saves a lot of bandwith as the files are fetched from the object store directly * fix: use explicit local storage in tests * feat: integrate s3 storage with the main server * fix: add s3 config to cli tests * docs: explicitly set values in example config also adds license header to the storage package * fix: use better http status code on s3 redirect HTTP 302 Found is the best fit, as it signifies that the resource requested was found but not under its presumed URL 307/TemporaryRedirect would mean that this resource is usually located here, not in this case 303/SeeOther indicates that the redirection does not link to the requested resource but to another page * refactor: use context in storage driver interface
228 lines
5.2 KiB
ArmAsm
228 lines
5.2 KiB
ArmAsm
// Copyright (c) 2020 MinIO Inc. All rights reserved.
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// Use of this source code is governed by a license that can be
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// found in the LICENSE file.
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// This is the AVX512 implementation of the MD5 block function (16-way parallel)
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#define prep(index) \
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KMOVQ kmask, ktmp \
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VPGATHERDD index*4(base)(ptrs*1), ktmp, mem
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#define ROUND1(a, b, c, d, index, const, shift) \
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VXORPS c, tmp, tmp \
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VPADDD 64*const(consts), a, a \
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VPADDD mem, a, a \
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VPTERNLOGD $0x6C, b, d, tmp \
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prep(index) \
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VPADDD tmp, a, a \
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VPROLD $shift, a, a \
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VMOVAPD c, tmp \
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VPADDD b, a, a
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#define ROUND1noload(a, b, c, d, const, shift) \
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VXORPS c, tmp, tmp \
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VPADDD 64*const(consts), a, a \
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VPADDD mem, a, a \
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VPTERNLOGD $0x6C, b, d, tmp \
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VPADDD tmp, a, a \
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VPROLD $shift, a, a \
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VMOVAPD c, tmp \
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VPADDD b, a, a
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#define ROUND2(a, b, c, d, zreg, const, shift) \
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VPADDD 64*const(consts), a, a \
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VPADDD zreg, a, a \
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VANDNPS c, tmp, tmp \
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VPTERNLOGD $0xEC, b, tmp, tmp2 \
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VMOVAPD c, tmp \
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VPADDD tmp2, a, a \
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VMOVAPD c, tmp2 \
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VPROLD $shift, a, a \
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VPADDD b, a, a
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#define ROUND3(a, b, c, d, zreg, const, shift) \
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VPADDD 64*const(consts), a, a \
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VPADDD zreg, a, a \
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VPTERNLOGD $0x96, b, d, tmp \
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VPADDD tmp, a, a \
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VPROLD $shift, a, a \
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VMOVAPD b, tmp \
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VPADDD b, a, a
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#define ROUND4(a, b, c, d, zreg, const, shift) \
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VPADDD 64*const(consts), a, a \
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VPADDD zreg, a, a \
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VPTERNLOGD $0x36, b, c, tmp \
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VPADDD tmp, a, a \
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VPROLD $shift, a, a \
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VXORPS c, ones, tmp \
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VPADDD b, a, a
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TEXT ·block16(SB),4,$0-40
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MOVQ state+0(FP), BX
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MOVQ base+8(FP), SI
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MOVQ ptrs+16(FP), AX
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KMOVQ mask+24(FP), K1
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MOVQ n+32(FP), DX
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MOVQ ·avx512md5consts+0(SB), DI
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#define a Z0
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#define b Z1
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#define c Z2
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#define d Z3
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#define sa Z4
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#define sb Z5
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#define sc Z6
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#define sd Z7
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#define tmp Z8
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#define tmp2 Z9
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#define ptrs Z10
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#define ones Z12
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#define mem Z15
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#define kmask K1
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#define ktmp K3
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// ----------------------------------------------------------
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// Registers Z16 through to Z31 are used for caching purposes
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// ----------------------------------------------------------
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#define dig BX
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#define count DX
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#define base SI
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#define consts DI
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// load digest into state registers
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VMOVUPD (dig), a
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VMOVUPD 0x40(dig), b
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VMOVUPD 0x80(dig), c
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VMOVUPD 0xc0(dig), d
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// load source pointers
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VMOVUPD 0x00(AX), ptrs
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MOVQ $-1, AX
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VPBROADCASTQ AX, ones
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loop:
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VMOVAPD a, sa
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VMOVAPD b, sb
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VMOVAPD c, sc
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VMOVAPD d, sd
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prep(0)
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VMOVAPD d, tmp
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VMOVAPD mem, Z16
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ROUND1(a,b,c,d, 1,0x00, 7)
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VMOVAPD mem, Z17
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ROUND1(d,a,b,c, 2,0x01,12)
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VMOVAPD mem, Z18
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ROUND1(c,d,a,b, 3,0x02,17)
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VMOVAPD mem, Z19
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ROUND1(b,c,d,a, 4,0x03,22)
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VMOVAPD mem, Z20
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ROUND1(a,b,c,d, 5,0x04, 7)
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VMOVAPD mem, Z21
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ROUND1(d,a,b,c, 6,0x05,12)
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VMOVAPD mem, Z22
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ROUND1(c,d,a,b, 7,0x06,17)
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VMOVAPD mem, Z23
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ROUND1(b,c,d,a, 8,0x07,22)
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VMOVAPD mem, Z24
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ROUND1(a,b,c,d, 9,0x08, 7)
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VMOVAPD mem, Z25
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ROUND1(d,a,b,c,10,0x09,12)
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VMOVAPD mem, Z26
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ROUND1(c,d,a,b,11,0x0a,17)
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VMOVAPD mem, Z27
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ROUND1(b,c,d,a,12,0x0b,22)
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VMOVAPD mem, Z28
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ROUND1(a,b,c,d,13,0x0c, 7)
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VMOVAPD mem, Z29
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ROUND1(d,a,b,c,14,0x0d,12)
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VMOVAPD mem, Z30
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ROUND1(c,d,a,b,15,0x0e,17)
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VMOVAPD mem, Z31
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ROUND1noload(b,c,d,a, 0x0f,22)
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VMOVAPD d, tmp
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VMOVAPD d, tmp2
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ROUND2(a,b,c,d, Z17,0x10, 5)
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ROUND2(d,a,b,c, Z22,0x11, 9)
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ROUND2(c,d,a,b, Z27,0x12,14)
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ROUND2(b,c,d,a, Z16,0x13,20)
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ROUND2(a,b,c,d, Z21,0x14, 5)
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ROUND2(d,a,b,c, Z26,0x15, 9)
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ROUND2(c,d,a,b, Z31,0x16,14)
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ROUND2(b,c,d,a, Z20,0x17,20)
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ROUND2(a,b,c,d, Z25,0x18, 5)
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ROUND2(d,a,b,c, Z30,0x19, 9)
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ROUND2(c,d,a,b, Z19,0x1a,14)
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ROUND2(b,c,d,a, Z24,0x1b,20)
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ROUND2(a,b,c,d, Z29,0x1c, 5)
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ROUND2(d,a,b,c, Z18,0x1d, 9)
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ROUND2(c,d,a,b, Z23,0x1e,14)
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ROUND2(b,c,d,a, Z28,0x1f,20)
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VMOVAPD c, tmp
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ROUND3(a,b,c,d, Z21,0x20, 4)
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ROUND3(d,a,b,c, Z24,0x21,11)
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ROUND3(c,d,a,b, Z27,0x22,16)
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ROUND3(b,c,d,a, Z30,0x23,23)
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ROUND3(a,b,c,d, Z17,0x24, 4)
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ROUND3(d,a,b,c, Z20,0x25,11)
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ROUND3(c,d,a,b, Z23,0x26,16)
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ROUND3(b,c,d,a, Z26,0x27,23)
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ROUND3(a,b,c,d, Z29,0x28, 4)
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ROUND3(d,a,b,c, Z16,0x29,11)
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ROUND3(c,d,a,b, Z19,0x2a,16)
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ROUND3(b,c,d,a, Z22,0x2b,23)
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ROUND3(a,b,c,d, Z25,0x2c, 4)
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ROUND3(d,a,b,c, Z28,0x2d,11)
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ROUND3(c,d,a,b, Z31,0x2e,16)
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ROUND3(b,c,d,a, Z18,0x2f,23)
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VXORPS d, ones, tmp
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ROUND4(a,b,c,d, Z16,0x30, 6)
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ROUND4(d,a,b,c, Z23,0x31,10)
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ROUND4(c,d,a,b, Z30,0x32,15)
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ROUND4(b,c,d,a, Z21,0x33,21)
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ROUND4(a,b,c,d, Z28,0x34, 6)
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ROUND4(d,a,b,c, Z19,0x35,10)
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ROUND4(c,d,a,b, Z26,0x36,15)
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ROUND4(b,c,d,a, Z17,0x37,21)
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ROUND4(a,b,c,d, Z24,0x38, 6)
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ROUND4(d,a,b,c, Z31,0x39,10)
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ROUND4(c,d,a,b, Z22,0x3a,15)
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ROUND4(b,c,d,a, Z29,0x3b,21)
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ROUND4(a,b,c,d, Z20,0x3c, 6)
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ROUND4(d,a,b,c, Z27,0x3d,10)
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ROUND4(c,d,a,b, Z18,0x3e,15)
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ROUND4(b,c,d,a, Z25,0x3f,21)
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VPADDD sa, a, a
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VPADDD sb, b, b
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VPADDD sc, c, c
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VPADDD sd, d, d
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LEAQ 64(base), base
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SUBQ $64, count
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JNE loop
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VMOVUPD a, (dig)
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VMOVUPD b, 0x40(dig)
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VMOVUPD c, 0x80(dig)
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VMOVUPD d, 0xc0(dig)
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VZEROUPPER
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RET
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